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defining a variable in bsv compilation

 
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yonigo



Joined: 17 Aug 2013
Posts: 9

PostPosted: Thu Apr 03, 2014 10:45 am    Post subject: defining a variable in bsv compilation Reply with quote

Hi there,
Is it possible to define a variable in my compilation line so that it could be used in my source code?
for example:
bsv ... -define AAA ...

and somewhere in my code i could use :

`ifdef AAA
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quark
Site Admin


Joined: 02 Nov 2007
Posts: 495

PostPosted: Thu Apr 03, 2014 11:05 am    Post subject: Re: defining a variable in bsv compilation Reply with quote

Yes. BSV supports the Verilog 2001 preprocessor directives. Documentation on this is in the BSV Reference Guide section 2.7, "Compiler directives".

When you call BSC, you'll use the -D flag to define variables for the preprocessor. This is defined in section 7.9 of the User Guide. There is also an option to apply a C preprocessor (User Guide 7.16), if you prefer, but the Verilog preprocessor should do what you want.
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