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Changing initial values of RegU in bluesim.

 
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tomahawkins



Joined: 14 Dec 2012
Posts: 21

PostPosted: Tue Jul 23, 2013 12:58 pm    Post subject: Changing initial values of RegU in bluesim. Reply with quote

Is it possible for bsim to initialize mkRegU elements to 0 instead of A?

I tried the -unspecified-to switch, but it appears to affect Reg but not RegU elements.

-Tom
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quark
Site Admin


Joined: 02 Nov 2007
Posts: 496

PostPosted: Tue Jul 23, 2013 2:30 pm    Post subject: Re: Changing initial values of RegU in bluesim. Reply with quote

The -unspecified-to switch affects uses of don't-care values in the code, not in the primitive modules themselves. So it would pick a value for the "?" in "mkReg(?)", but does not affect initial blocks.

In this case, I think you would have to use a script to post-process the Verilog. The following script should work, which you can save to a file "initial-values-to-0.pl" and then you can have BSC automatically call it, so that the change is seamless, using the flag "-verilog-filter <cmd>" (which is unfortunately a hidden flag at the moment).
Code:
# bsc -verilog -verilog-filter initial-values-to-0.pl ...

Code:
#!/usr/bin/perl -pi~

# Convert all initial values from AAAAAAA to 0
# which is slightly nicer for fpgas
# of course you should still have a reset test plan!

$inside = 1 if (/ifdef BSV_NO_INITIAL_BLOCKS/);
$inside = 0 if (/endif \/\/ BSV_NO_INITIAL_BLOCKS/);

if ($inside == 1) {
    s/([A20]+)\;/0\;/;
}

As the comment says, your design shouldn't rely on any specific values in initial blocks. Your design should expect that registers may be in any state until they are reset. I assume that you want to change the initial value for debugging purposes? Or does your synthesis tool do something with initial blocks? Or ...?
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