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  Topic: Bluespec link failure with .cpp, irrespective of directory
vmurali

Replies: 2
Views: 13425

PostForum: Tools: Bluesim   Posted: Sat Aug 25, 2012 7:55 am   Subject: Bluespec link failure with .cpp, irrespective of directory
Ok, this works. The function is indeed not present in the object file unless I put an extern "C".
  Topic: Bluespec link failure with .cpp, irrespective of directory
vmurali

Replies: 2
Views: 13425

PostForum: Tools: Bluesim   Posted: Fri Aug 24, 2012 7:24 am   Subject: Bluespec link failure with .cpp, irrespective of directory
Hi

I posted the same question here http://www.bluespec.com/forum/viewtopic.php?t=233 , but got no responses, so I am posting again.

I run into the same issue. I have double checked if I have inc ...
  Topic: Bluesim linkage failure
vmurali

Replies: 7
Views: 20659

PostForum: Tools: Bluesim   Posted: Thu Aug 16, 2012 1:07 pm   Subject: Bluesim link problem (dlopen error) unresolved
I run into the same issue. I have double checked if I have included the .cpp file while calling bsc for linking. I also made sure that the c++ command includes the .o file for creating the a.out.so. H ...
  Topic: Problem with typedefs/imports
vmurali

Replies: 2
Views: 9902

PostForum: Tools: BSC (Bluespec Compiler)   Posted: Wed Jun 29, 2011 4:35 pm   Subject: Problem with typedefs/imports
Alright thanks for the explanation.

For future reference, the syntax for 'export' is documented in the reference guide (Section: Packages and the outermost structure of a BSV design).

On a sligh ...
  Topic: Problem with typedefs/imports
vmurali

Replies: 2
Views: 9902

PostForum: Tools: BSC (Bluespec Compiler)   Posted: Wed Jun 29, 2011 2:01 pm   Subject: Problem with typedefs/imports
If I typedef an interface in a new package, and import only the package containing the typedef, I am not able to access the methods of the interface. Is this a bug or is it intentional? The compiler v ...
  Topic: Verilog simulator not found
vmurali

Replies: 5
Views: 15169

PostForum: Tools: BSC (Bluespec Compiler)   Posted: Tue May 05, 2009 2:17 pm   Subject: Verilog simulator not found
Alright found the bug. Its the old Ubuntu dash error. The scripts bsc_build_vsim_iverilog etc invokes sh for running (the #!/bin/sh in the first line), and Ubuntu symlinks sh to dash. "shift" ...
  Topic: Verilog simulator not found
vmurali

Replies: 5
Views: 15169

PostForum: Tools: BSC (Bluespec Compiler)   Posted: Tue May 05, 2009 1:13 pm   Subject: Verilog simulator not found
Sorry, the versions I tried it on are 2008.11.C and 2008.12.beta2. Both have the same behavior
  Topic: Verilog simulator not found
vmurali

Replies: 5
Views: 15169

PostForum: Tools: BSC (Bluespec Compiler)   Posted: Tue May 05, 2009 12:14 pm   Subject: Verilog simulator not found
Hi Ed,

I tried it on versions 2008.11.C and 2009.12.beta2

Bluespec top level directory is installed in /usr/share/Bluespec/bsc

I compiled it using the following commands in bash:

$ export ...
  Topic: Verilog simulator not found
vmurali

Replies: 5
Views: 15169

PostForum: Tools: BSC (Bluespec Compiler)   Posted: Tue May 05, 2009 11:00 am   Subject: Verilog simulator not found
The compiler is not able to automatically find the Verilog simulator (iverilog), eventhough iverilog is in the path, (/usr/bin/iverilog) . It exits with the following error:


shift: 33: can't shif ...
  Topic: Syntax for Vector of functions
vmurali

Replies: 2
Views: 9106

PostForum: Designing with BSV's Rules, Interfaces, ...   Posted: Sat Aug 02, 2008 5:14 pm   Subject: Syntax for Vector of functions
yup, that works. Thanks
  Topic: Syntax for Vector of functions
vmurali

Replies: 2
Views: 9106

PostForum: Designing with BSV's Rules, Interfaces, ...   Posted: Sat Aug 02, 2008 12:53 pm   Subject: Syntax for Vector of functions
I tried to create a vector of functions using the same syntax as a vector of interfaces:


import Vector::*;

(* synthesize *)
module mkTest();
Vector#(4, Reg#&# ...
 
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